Kaushik Roy
Affiliations: | 1990- | Electrical and Computer Engineering | Purdue University, West Lafayette, IN, United States |
Area:
Electronics and Electrical EngineeringWebsite:
https://www.purdue.edu/uns/html3month/2005/050211.BOT.academic.htmlGoogle:
"Kaushik Roy"Bio:
Parents
Sign in to add mentorJanak H. Patel | grad student | 1990 | UIUC (Computer Science Tree) | |
(Timing verification and synthesis of circuits for delay fault testability.) |
Children
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Publications
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Parsa M, Mitchell JP, Schuman CD, et al. (2020) Bayesian Multi-objective Hyperparameter Optimization for Accurate, Fast, and Efficient Neural Network Accelerator Design. Frontiers in Neuroscience. 14: 667 |
Xia Q, Berggren KK, Likharev K, et al. (2020) Roadmap on emerging hardware and technology for machine learning. Nanotechnology |
Chakraborty I, Agrawal A, Jaiswal A, et al. (2020) unsupervised learning using stochastic switching in magneto-electric magnetic tunnel junctions. Philosophical Transactions. Series a, Mathematical, Physical, and Engineering Sciences. 378: 20190157 |
Andrawis R, Roy K. (2020) Antiferroelectric Tunnel Junctions as Energy-Efficient Coupled Oscillators: Modeling, Analysis, and Application to Solving Combinatorial Optimization Problems Ieee Transactions On Electron Devices. 67: 2974-2980 |
Compagnoni CM, Kang J, Shih Y, et al. (2020) Editorial Special Issue on “Memory Devices and Technologies for the Next Decade” Ieee Transactions On Electron Devices. 67: 1369-1372 |
Jaiswal A, Andrawis R, Agrawal A, et al. (2020) Functional Read Enabling In-Memory Computations in 1Transistor -1Resistor Memory Arrays Ieee Transactions On Circuits and Systems Ii-Express Briefs. 1-1 |
Ali MF, Andrawis R, Roy K. (2020) Dynamic Read Current Sensing With Amplified Bit-Line Voltage for STT-MRAMs Ieee Transactions On Circuits and Systems Ii-Express Briefs. 67: 551-555 |
Ali M, Jaiswal A, Kodge S, et al. (2020) IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array Ieee Transactions On Circuits and Systems. 67: 2521-2531 |
Koo M, Srinivasan G, Shim Y, et al. (2020) sBSNN: Stochastic-Bits Enabled Binary Spiking Neural Network With On-Chip Learning for Energy Efficient Neuromorphic Computing at the Edge Ieee Transactions On Circuits and Systems. 67: 2546-2555 |
Ali MF, Jaiswal A, Roy K. (2020) In-Memory Low-Cost Bit-Serial Addition Using Commodity DRAM Technology Ieee Transactions On Circuits and Systems I-Regular Papers. 67: 155-165 |